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Energy-aware interconnect optimization for a coarse grained reconfigurable processor

dc.contributor.authorLambrechts, Andy
dc.contributor.authorRaghavan, Praveen
dc.contributor.authorJayapala, Murali
dc.contributor.authorCatthoor, Francky
dc.contributor.authorVerkest, Diederik
dc.date.accessioned2021-10-17T08:08:06Z
dc.date.available2021-10-17T08:08:06Z
dc.date.issued2008-01
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/13981
dc.sourceIIOimport
dc.titleEnergy-aware interconnect optimization for a coarse grained reconfigurable processor
dc.typeProceedings paper
dc.contributor.imecauthorLambrechts, Andy
dc.contributor.imecauthorJayapala, Murali
dc.contributor.imecauthorCatthoor, Francky
dc.contributor.imecauthorVerkest, Diederik
dc.contributor.orcidimecLambrechts, Andy::0000-0001-7592-2999
dc.contributor.orcidimecJayapala, Murali::0000-0001-7917-0149
dc.contributor.orcidimecCatthoor, Francky::0000-0002-3599-8515
dc.contributor.orcidimecVerkest, Diederik::0000-0001-6567-2746
dc.date.embargo9999-12-31
dc.source.peerreviewyes
dc.source.beginpage201
dc.source.endpage207
dc.source.conference21st International Conference on VLSI Design - VLSID
dc.source.conferencedate4/01/2008
dc.source.conferencelocationHyderabad India
imec.availabilityPublished - open access


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