RTP requirements for CMOS integration of dual work function phase controlled Ni-FUSI (fully silicided) gates with simultaneous silicidation of nMOS (NiSi) and pMOS (Ni-rich silicide) gates on HfSiON
dc.contributor.author | Lauwers, Anne | |
dc.contributor.author | Kittl, Jorge | |
dc.contributor.author | Maex, Karen | |
dc.date.accessioned | 2021-10-17T08:11:30Z | |
dc.date.available | 2021-10-17T08:11:30Z | |
dc.date.issued | 2008 | |
dc.identifier.issn | 0255-5476 | |
dc.identifier.uri | https://imec-publications.be/handle/20.500.12860/13994 | |
dc.source | IIOimport | |
dc.title | RTP requirements for CMOS integration of dual work function phase controlled Ni-FUSI (fully silicided) gates with simultaneous silicidation of nMOS (NiSi) and pMOS (Ni-rich silicide) gates on HfSiON | |
dc.type | Journal article | |
dc.contributor.imecauthor | Lauwers, Anne | |
dc.contributor.imecauthor | Maex, Karen | |
dc.date.embargo | 9999-12-31 | |
dc.source.peerreview | yes | |
dc.source.beginpage | 341 | |
dc.source.endpage | 351 | |
dc.source.journal | Materials Science Forum | |
dc.source.volume | 573-574 | |
imec.availability | Published - open access | |
imec.internalnotes | Rapid Thermal Processing and beyond: Applications in Semiconductor Processing |