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C-V Interpretation and the Conductance Technique for III-V and Ge based CMOS

dc.contributor.authorMartens, Koen
dc.contributor.authorMaes, Herman
dc.contributor.authorGroeseneken, Guido
dc.date.accessioned2021-10-17T08:51:20Z
dc.date.available2021-10-17T08:51:20Z
dc.date.issued2008
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/14131
dc.sourceIIOimport
dc.titleC-V Interpretation and the Conductance Technique for III-V and Ge based CMOS
dc.typeProceedings paper
dc.contributor.imecauthorMartens, Koen
dc.contributor.imecauthorGroeseneken, Guido
dc.contributor.orcidimecMartens, Koen::0000-0001-7135-5536
dc.source.peerreviewno
dc.source.conference32nd Workshop on Compound Semiconductor Devices - WOCSDICE
dc.source.conferencedate11/05/2008
dc.source.conferencelocationLeuven Belgium
imec.availabilityPublished - imec


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