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Reliability sssessment of integrated power transistors: lateral DMOS versus vertical DMOS

dc.contributor.authorMoens, Peter
dc.contributor.authorVan den Bosch, Geert
dc.date.accessioned2021-10-17T09:07:29Z
dc.date.available2021-10-17T09:07:29Z
dc.date.issued2008
dc.identifier.issn0026-2714
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/14182
dc.sourceIIOimport
dc.titleReliability sssessment of integrated power transistors: lateral DMOS versus vertical DMOS
dc.typeJournal article
dc.contributor.imecauthorMoens, Peter
dc.contributor.imecauthorVan den Bosch, Geert
dc.contributor.orcidimecVan den Bosch, Geert::0000-0001-9971-6954
dc.source.peerreviewyes
dc.source.beginpage1300
dc.source.endpage13005
dc.source.journalMicroelectronics Reliability
dc.source.issue8_9
dc.source.volume48
imec.availabilityPublished - imec
imec.internalnotespaper from ESREF2008


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