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Synthesis of runtime switchable pareto buffers offering full range fine grained energy/delay trade-offs
Publication:
Synthesis of runtime switchable pareto buffers offering full range fine grained energy/delay trade-offs
Date
2008
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APA
Chicago
Harvard
IEEE
Basic data
APA
Chicago
Harvard
IEEE
Author(s)
Wang, Hua
;
Catthoor, Francky
;
Miranda Corbalan, Miguel
;
Dehaene, Wim
Journal
Journal on VLSI Signal Processing
Abstract
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1929
since deposited on 2021-10-17
Acq. date: 2025-10-25
Citations
Metrics
Views
1929
since deposited on 2021-10-17
Acq. date: 2025-10-25
Citations