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Evaluation of energy-recovering interconnects for low-power 3D stacked ICs

dc.contributor.authorAsimakopoulos, Panagiotis
dc.contributor.authorVan der Plas, Geert
dc.contributor.authorYakovlev, A.
dc.contributor.authorMarchal, Pol
dc.date.accessioned2021-10-17T21:18:27Z
dc.date.available2021-10-17T21:18:27Z
dc.date.issued2009
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/14916
dc.sourceIIOimport
dc.titleEvaluation of energy-recovering interconnects for low-power 3D stacked ICs
dc.typeProceedings paper
dc.contributor.imecauthorVan der Plas, Geert
dc.contributor.orcidimecVan der Plas, Geert::0000-0002-4975-6672
dc.source.peerreviewyes
dc.source.beginpage1
dc.source.endpage5
dc.source.conferenceIEEE International Conference on 3D System Integration - 3DIC
dc.source.conferencedate28/09/2009
dc.source.conferencelocationSan Francisco, CA USA
imec.availabilityPublished - imec


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