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A digitally-controlled compact 57-66GHz receiver front-end for phased-arrays in 45nm digital CMOS

dc.contributor.authorBorremans, Jonathan
dc.contributor.authorRaczkowski, Kuba
dc.contributor.authorWambacq, Piet
dc.date.accessioned2021-10-17T21:25:46Z
dc.date.available2021-10-17T21:25:46Z
dc.date.issued2009-02
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/15019
dc.sourceIIOimport
dc.titleA digitally-controlled compact 57-66GHz receiver front-end for phased-arrays in 45nm digital CMOS
dc.typeProceedings paper
dc.contributor.imecauthorWambacq, Piet
dc.contributor.orcidimecWambacq, Piet::0000-0003-4388-7257
dc.date.embargo9999-12-31
dc.source.peerreviewno
dc.source.beginpage492
dc.source.endpage493
dc.source.conferenceIEEE International Solid-State Circuits Conference - ISSCC
dc.source.conferencedate8/02/2009
dc.source.conferencelocationSan Francisco, CA USA
imec.availabilityPublished - open access


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