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A single bit 6.8mW 10MHz power-optimized continuous-time DS with 67dB DR in 90nm CMOS

dc.contributor.authorCrombez, Pieter
dc.contributor.authorVan der Plas, Geert
dc.contributor.authorSteyaert, Michiel
dc.contributor.authorCraninckx, Jan
dc.date.accessioned2021-10-17T21:42:12Z
dc.date.available2021-10-17T21:42:12Z
dc.date.issued2009
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/15143
dc.sourceIIOimport
dc.titleA single bit 6.8mW 10MHz power-optimized continuous-time DS with 67dB DR in 90nm CMOS
dc.typeProceedings paper
dc.contributor.imecauthorVan der Plas, Geert
dc.contributor.imecauthorCraninckx, Jan
dc.contributor.orcidimecVan der Plas, Geert::0000-0002-4975-6672
dc.contributor.orcidimecCraninckx, Jan::0000-0002-3980-0203
dc.date.embargo9999-12-31
dc.source.peerreviewyes
dc.source.beginpage336
dc.source.endpage339
dc.source.conference35th European Solid-State Circuits Conference - ESSCIRC
dc.source.conferencedate14/09/2009
dc.source.conferencelocationAthens Greece
imec.availabilityPublished - open access


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