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Performance enhancement in Ge pMOSFETs with <100>-orientation fabricated with a Si-compatible process flow

dc.contributor.authorDutta Gupta, Shubham
dc.contributor.authorMitard, Jerome
dc.contributor.authorEneman, Geert
dc.contributor.authorDe Jaeger, Brice
dc.contributor.authorMeuris, Marc
dc.contributor.authorHeyns, Marc
dc.date.accessioned2021-10-17T22:02:06Z
dc.date.available2021-10-17T22:02:06Z
dc.date.issued2009
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/15254
dc.sourceIIOimport
dc.titlePerformance enhancement in Ge pMOSFETs with <100>-orientation fabricated with a Si-compatible process flow
dc.typeMeeting abstract
dc.contributor.imecauthorMitard, Jerome
dc.contributor.imecauthorEneman, Geert
dc.contributor.imecauthorDe Jaeger, Brice
dc.contributor.imecauthorMeuris, Marc
dc.contributor.imecauthorHeyns, Marc
dc.contributor.orcidimecMitard, Jerome::0000-0002-7422-079X
dc.contributor.orcidimecEneman, Geert::0000-0002-5849-3384
dc.contributor.orcidimecDe Jaeger, Brice::0000-0001-8804-7556
dc.contributor.orcidimecMeuris, Marc::0000-0002-9580-6810
dc.source.peerreviewyes
dc.source.conference2nd International Workshop on Electron Devices and Semiconductor Technology - IEDST
dc.source.conferencedate1/06/2009
dc.source.conferencelocationMumbai India
imec.availabilityPublished - imec


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