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Negative bias temperature instabilities in high-k gate dielectrics

dc.contributor.authorHoussa, Michel
dc.contributor.authorAoulaiche, Marc
dc.contributor.authorDe Gendt, Stefan
dc.contributor.authorGroeseneken, Guido
dc.contributor.authorHeyns, Marc
dc.date.accessioned2021-10-17T22:58:30Z
dc.date.available2021-10-17T22:58:30Z
dc.date.issued2009
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/15492
dc.sourceIIOimport
dc.titleNegative bias temperature instabilities in high-k gate dielectrics
dc.typeBook chapter
dc.contributor.imecauthorHoussa, Michel
dc.contributor.imecauthorDe Gendt, Stefan
dc.contributor.imecauthorGroeseneken, Guido
dc.contributor.imecauthorHeyns, Marc
dc.contributor.orcidimecHoussa, Michel::0000-0003-1844-3515
dc.contributor.orcidimecDe Gendt, Stefan::0000-0003-3775-3578
dc.date.embargo9999-12-31
dc.source.peerreviewno
dc.source.beginpage359
dc.source.bookDefects in Microelectronic Materials and Devices
dc.source.endpage380
imec.availabilityPublished - open access
imec.internalnotesChapter 12


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