Show simple item record

dc.contributor.authorLaidler, David
dc.contributor.authorRosslee, Craig
dc.contributor.authorD'have, Koen
dc.contributor.authorLeray, Philippe
dc.contributor.authorTedeschi, Len
dc.date.accessioned2021-10-17T23:42:35Z
dc.date.available2021-10-17T23:42:35Z
dc.date.issued2009
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/15647
dc.sourceIIOimport
dc.titleTrack optimization and control for 32nm node double patterning and beyond
dc.typeProceedings paper
dc.contributor.imecauthorLaidler, David
dc.contributor.imecauthorD'have, Koen
dc.contributor.imecauthorLeray, Philippe
dc.contributor.orcidimecLaidler, David::0000-0003-4055-3366
dc.contributor.orcidimecD'have, Koen::0000-0002-5195-9241
dc.date.embargo9999-12-31
dc.source.peerreviewno
dc.source.beginpage727236
dc.source.conferenceMetrology, Inspection, and Process Control for Microlithography XXIII
dc.source.conferencedate22/02/2009
dc.source.conferencelocationSan Jose, CA USA
imec.availabilityPublished - open access
imec.internalnotesProceedings of SPIE; Vol.7272


Files in this item

Thumbnail

This item appears in the following collection(s)

Show simple item record