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Failure analysis and process improvement for through silicon via interconnects

dc.contributor.authorMajeed, Bivragh
dc.contributor.authorVan Cauwenberghe, Marc
dc.contributor.authorSabuncuoglu Tezcan, Deniz
dc.contributor.authorSoussan, Philippe
dc.date.accessioned2021-10-18T00:24:55Z
dc.date.available2021-10-18T00:24:55Z
dc.date.issued2009
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/15789
dc.sourceIIOimport
dc.titleFailure analysis and process improvement for through silicon via interconnects
dc.typeProceedings paper
dc.contributor.imecauthorMajeed, Bivragh
dc.contributor.imecauthorVan Cauwenberghe, Marc
dc.contributor.imecauthorSabuncuoglu Tezcan, Deniz
dc.contributor.imecauthorSoussan, Philippe
dc.contributor.orcidimecSabuncuoglu Tezcan, Deniz::0000-0002-9237-7862
dc.contributor.orcidimecSoussan, Philippe::0000-0002-1347-6978
dc.source.peerreviewno
dc.source.beginpage1156-D08-04
dc.source.conferenceMaterials, Processes and Reliability for Advanced Interconnects for Micro- and Nanoelectronics
dc.source.conferencedate13/04/2009
dc.source.conferencelocationSan Francisco, CA USA
imec.availabilityPublished - imec
imec.internalnotesMRS Symposium Proceedings; VOl. 1156


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