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Circuit-design oriented modelling of the recovery BTI component and post-BD gate currents

dc.contributor.authorMartin-Martinez, Javier
dc.contributor.authorKaczer, Ben
dc.contributor.authorBoix, J.
dc.contributor.authorAyala, N.
dc.contributor.authorRodriguez, Rosana
dc.contributor.authorNafria, Montserrat
dc.contributor.authorAymerich, X.
dc.contributor.authorZuber, Paul
dc.contributor.authorDierickx, Bart
dc.contributor.authorGroeseneken, Guido
dc.date.accessioned2021-10-18T00:39:55Z
dc.date.available2021-10-18T00:39:55Z
dc.date.issued2009-02
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/15837
dc.sourceIIOimport
dc.titleCircuit-design oriented modelling of the recovery BTI component and post-BD gate currents
dc.typeProceedings paper
dc.contributor.imecauthorKaczer, Ben
dc.contributor.imecauthorZuber, Paul
dc.contributor.imecauthorGroeseneken, Guido
dc.contributor.orcidimecKaczer, Ben::0000-0002-1484-4007
dc.source.peerreviewyes
dc.source.beginpage156
dc.source.endpage159
dc.source.conferenceSpanish Conference on Electron Devices - CDE
dc.source.conferencedate11/02/2009
dc.source.conferencelocationSantiago de Compostela Spain
imec.availabilityPublished - imec


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