Show simple item record

3D-stacked integrated circuits: design consequences, architectural aspects, design methodologies and tools

dc.contributor.authorMilojevic, Dragomir
dc.contributor.authorVan der Plas, Geert
dc.date.accessioned2021-10-18T00:49:24Z
dc.date.available2021-10-18T00:49:24Z
dc.date.issued2009
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/15865
dc.sourceIIOimport
dc.title3D-stacked integrated circuits: design consequences, architectural aspects, design methodologies and tools
dc.typeOral presentation
dc.contributor.imecauthorMilojevic, Dragomir
dc.contributor.imecauthorVan der Plas, Geert
dc.contributor.orcidimecVan der Plas, Geert::0000-0002-4975-6672
dc.source.peerreviewno
dc.source.conference9th Architectures and Compilers for Embedded Systems Symposium - ACES
dc.source.conferencedate7/09/2009
dc.source.conferencelocationEdegem Belgium
imec.availabilityPublished - imec


Files in this item

FilesSizeFormatView

There are no files associated with this item.

This item appears in the following collection(s)

Show simple item record