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Junction anneal sequence optimization for advanced high-k / metal gate CMOS technology

dc.contributor.authorOrtolland, Claude
dc.contributor.authorRagnarsson, Lars-Ake
dc.contributor.authorKerner, Christoph
dc.contributor.authorChiarella, Thomas
dc.contributor.authorRosseel, Erik
dc.contributor.authorOkuno, Yasutoshi
dc.contributor.authorFavia, Paola
dc.contributor.authorRichard, Olivier
dc.contributor.authorEveraert, Jean-Luc
dc.contributor.authorSchram, Tom
dc.contributor.authorKubicek, Stefan
dc.contributor.authorAbsil, Philippe
dc.contributor.authorBiesemans, Serge
dc.contributor.authorSchreutelkamp, Robert
dc.contributor.authorHoffmann, Thomas Y.
dc.date.accessioned2021-10-18T01:19:48Z
dc.date.available2021-10-18T01:19:48Z
dc.date.issued2009
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/15952
dc.sourceIIOimport
dc.titleJunction anneal sequence optimization for advanced high-k / metal gate CMOS technology
dc.typeProceedings paper
dc.contributor.imecauthorRagnarsson, Lars-Ake
dc.contributor.imecauthorKerner, Christoph
dc.contributor.imecauthorChiarella, Thomas
dc.contributor.imecauthorRosseel, Erik
dc.contributor.imecauthorFavia, Paola
dc.contributor.imecauthorRichard, Olivier
dc.contributor.imecauthorEveraert, Jean-Luc
dc.contributor.imecauthorSchram, Tom
dc.contributor.imecauthorKubicek, Stefan
dc.contributor.imecauthorAbsil, Philippe
dc.contributor.imecauthorBiesemans, Serge
dc.contributor.orcidimecRagnarsson, Lars-Ake::0000-0003-1057-8140
dc.contributor.orcidimecChiarella, Thomas::0000-0002-6155-9030
dc.contributor.orcidimecFavia, Paola::0000-0002-1019-3497
dc.contributor.orcidimecRichard, Olivier::0000-0002-3994-8021
dc.source.peerreviewno
dc.source.conference9th International Workshop on Junction Technology - IWJT
dc.source.conferencedate11/06/2009
dc.source.conferencelocationKyoto Japan
imec.availabilityPublished - imec


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