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CMP processing to enable 3D stacked IC integration

dc.contributor.authorVaes, Jan
dc.contributor.authorHeylen, Nancy
dc.contributor.authorVan Olmen, Jan
dc.contributor.authorHuyghebaert, Cedric
dc.contributor.authorLeunissen, Peter
dc.date.accessioned2021-10-18T03:50:47Z
dc.date.available2021-10-18T03:50:47Z
dc.date.issued2009
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/16340
dc.sourceIIOimport
dc.titleCMP processing to enable 3D stacked IC integration
dc.typeProceedings paper
dc.contributor.imecauthorHeylen, Nancy
dc.contributor.imecauthorVan Olmen, Jan
dc.contributor.imecauthorHuyghebaert, Cedric
dc.contributor.orcidimecHuyghebaert, Cedric::0000-0001-6043-7130
dc.source.peerreviewno
dc.source.conferenceInternational Conference on Planarization/CMP Technology - ICPT
dc.source.conferencedate19/11/2009
dc.source.conferencelocationFukuoka Japan
imec.availabilityPublished - imec


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