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Spin-on dielectric liner TSV for 3D wafer level packaging applications

dc.contributor.authorCivale, Yann
dc.contributor.authorMajeed, Bivragh
dc.contributor.authorSabuncuoglu Tezcan, Deniz
dc.contributor.authorSoussan, Philippe
dc.contributor.authorBeyne, Eric
dc.date.accessioned2021-10-18T15:36:45Z
dc.date.available2021-10-18T15:36:45Z
dc.date.issued2010
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/16876
dc.sourceIIOimport
dc.titleSpin-on dielectric liner TSV for 3D wafer level packaging applications
dc.typeProceedings paper
dc.contributor.imecauthorMajeed, Bivragh
dc.contributor.imecauthorSabuncuoglu Tezcan, Deniz
dc.contributor.imecauthorSoussan, Philippe
dc.contributor.imecauthorBeyne, Eric
dc.contributor.orcidimecSabuncuoglu Tezcan, Deniz::0000-0002-9237-7862
dc.contributor.orcidimecSoussan, Philippe::0000-0002-1347-6978
dc.contributor.orcidimecBeyne, Eric::0000-0002-3096-050X
dc.source.peerreviewno
dc.source.conferenceIEEE International Interconnect Technology Conference - IITC
dc.source.conferencedate7/06/2010
dc.source.conferencelocationBurlingame, CA USA
imec.availabilityPublished - imec


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