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Substrate bias dependency of sense margin and retention in bulk FinFET 1T-DRAM cells

dc.contributor.authorCollaert, Nadine
dc.contributor.authorAoulaiche, Marc
dc.contributor.authorDe Keersgieter, An
dc.contributor.authorDe Wachter, Bart
dc.contributor.authorJurczak, Gosia
dc.contributor.authorAltimime, Laith
dc.date.accessioned2021-10-18T15:40:15Z
dc.date.available2021-10-18T15:40:15Z
dc.date.issued2010-09
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/16898
dc.sourceIIOimport
dc.titleSubstrate bias dependency of sense margin and retention in bulk FinFET 1T-DRAM cells
dc.typeProceedings paper
dc.contributor.imecauthorCollaert, Nadine
dc.contributor.imecauthorDe Keersgieter, An
dc.contributor.imecauthorDe Wachter, Bart
dc.contributor.imecauthorJurczak, Gosia
dc.contributor.orcidimecCollaert, Nadine::0000-0002-8062-3165
dc.contributor.orcidimecDe Keersgieter, An::0000-0002-5527-8582
dc.source.peerreviewno
dc.source.beginpage154
dc.source.endpage157
dc.source.conference40th European Solid-State Device Research Conference - ESSDERC
dc.source.conferencedate14/09/2010
dc.source.conferencelocationSevilla Spain
imec.availabilityPublished - imec


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