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An RDL-configurable 3D memory tier to replace on-chip SRAM

dc.contributor.authorFacchini, Marco
dc.contributor.authorMarchal, Pol
dc.contributor.authorCatthoor, Francky
dc.contributor.authorDehaene, Wim
dc.date.accessioned2021-10-18T16:19:08Z
dc.date.available2021-10-18T16:19:08Z
dc.date.issued2010
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/17094
dc.sourceIIOimport
dc.titleAn RDL-configurable 3D memory tier to replace on-chip SRAM
dc.typeProceedings paper
dc.contributor.imecauthorCatthoor, Francky
dc.contributor.imecauthorDehaene, Wim
dc.contributor.orcidimecCatthoor, Francky::0000-0002-3599-8515
dc.date.embargo9999-12-31
dc.source.peerreviewyes
dc.source.beginpage291
dc.source.endpage294
dc.source.conferenceDesign, Automation and Test in Europe Conference - DATE
dc.source.conferencedate8/03/2010
dc.source.conferencelocationDresden Germany
imec.availabilityPublished - open access


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