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dc.contributor.authorLoo, Roger
dc.contributor.authorWang, Gang
dc.contributor.authorSouriau, Laurent
dc.contributor.authorLin, Vic
dc.contributor.authorTakeuchi, Shotaro
dc.contributor.authorBrammertz, Guy
dc.contributor.authorCaymax, Matty
dc.date.accessioned2021-10-18T18:30:41Z
dc.date.available2021-10-18T18:30:41Z
dc.date.issued2010
dc.identifier.issn0013-4651
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/17529
dc.sourceIIOimport
dc.titleHigh quality Ge virtual substrates on Si wafers with standard STI patterning
dc.typeJournal article
dc.contributor.imecauthorLoo, Roger
dc.contributor.imecauthorSouriau, Laurent
dc.contributor.imecauthorBrammertz, Guy
dc.contributor.imecauthorCaymax, Matty
dc.contributor.orcidimecLoo, Roger::0000-0003-3513-6058
dc.contributor.orcidimecSouriau, Laurent::0000-0002-5138-5938
dc.contributor.orcidimecBrammertz, Guy::0000-0003-1404-7339
dc.source.peerreviewyes
dc.source.beginpageH13
dc.source.endpageH21
dc.source.journalJournal of the Electrochemical Society
dc.source.issue1
dc.source.volume157
imec.availabilityPublished - imec


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