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A standardizable 3D DfT architecture

dc.contributor.authorMarinissen, Erik Jan
dc.contributor.authorChi, Chun-Chuan
dc.contributor.authorVerbree, Jouke
dc.contributor.authorKonijnenburg, Mario
dc.date.accessioned2021-10-18T18:50:53Z
dc.date.available2021-10-18T18:50:53Z
dc.date.issued2010
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/17585
dc.sourceIIOimport
dc.titleA standardizable 3D DfT architecture
dc.typeOral presentation
dc.contributor.imecauthorMarinissen, Erik Jan
dc.contributor.imecauthorKonijnenburg, Mario
dc.contributor.orcidimecMarinissen, Erik Jan::0000-0002-5058-8303
dc.contributor.orcidimecKonijnenburg, Mario::0000-0001-8016-0888
dc.source.peerreviewno
dc.source.conferenceIEEE International Workshop on Testing Three-Dimensional Stacked Integrated Circuits - 3D-TEST
dc.source.conferencedate4/11/2010
dc.source.conferencelocationAustin, TX USA
imec.availabilityPublished - imec


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