Show simple item record

A parallel for loop memory template for a high level synthesis compiler

dc.contributor.authorMoore, Craig
dc.contributor.authorDevos, Harald
dc.contributor.authorStroobandt, Dirk
dc.date.accessioned2021-10-18T19:17:17Z
dc.date.available2021-10-18T19:17:17Z
dc.date.issued2010
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/17652
dc.sourceIIOimport
dc.titleA parallel for loop memory template for a high level synthesis compiler
dc.typeProceedings paper
dc.date.embargo9999-12-31
dc.source.peerreviewno
dc.source.beginpage449
dc.source.conferenceEuromicro Symposium on Digital Systems Design - DSD
dc.source.conferencedate1/09/2010
dc.source.conferencelocationLille France
imec.availabilityPublished - open access


Files in this item

Thumbnail
Name:
21756.pdf
Size:
254.1Kb
Format:
PDF
View/open

This item appears in the following collection(s)

Show simple item record