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dc.contributor.authorNiedermeier, Anja
dc.contributor.authorSvarstad, Kjetil
dc.contributor.authorBouwens, Frank
dc.contributor.authorHulzink, Jos
dc.contributor.authorHuisken, Jos
dc.date.accessioned2021-10-18T19:34:43Z
dc.date.available2021-10-18T19:34:43Z
dc.date.issued2010
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/17695
dc.sourceIIOimport
dc.titleThe challenges of implementing fine-grained power gating
dc.typeProceedings paper
dc.source.peerreviewno
dc.source.beginpage361
dc.source.endpage364
dc.source.conference20th Great Lakes Symposium on VLSI
dc.source.conferencedate16/05/2010
dc.source.conferencelocationProvidence, RI USA
imec.availabilityPublished - imec


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