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Test structures for characterization of through silicon vias

dc.contributor.authorStucchi, Michele
dc.contributor.authorPerry, Dan
dc.contributor.authorKatti, Guruprasad
dc.contributor.authorDehaene, Wim
dc.date.accessioned2021-10-18T22:02:29Z
dc.date.available2021-10-18T22:02:29Z
dc.date.issued2010
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/18047
dc.sourceIIOimport
dc.titleTest structures for characterization of through silicon vias
dc.typeProceedings paper
dc.contributor.imecauthorStucchi, Michele
dc.contributor.imecauthorDehaene, Wim
dc.source.peerreviewno
dc.source.beginpage130
dc.source.endpage134
dc.source.conference23rd IEEE International Conference on Microelectronic Test Structures - ICMTS
dc.source.conferencedate22/03/2010
dc.source.conferencelocationHiroshima Japan
imec.availabilityPublished - imec


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