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8Å Tinv gate-first dual channel technology achieving low-Vt high performance CMOS
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8Å Tinv gate-first dual channel technology achieving low-Vt high performance CMOS
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Date
2010
Proceedings Paper
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APA
Chicago
Harvard
IEEE
Basic data
APA
Chicago
Harvard
IEEE
Author(s)
Witters, Liesbeth
;
Takeoka, Shinji
;
Yamaguchi, Shinpei
;
Hikavyy, Andriy
;
Shamiryan, Denis
;
Cho, Moon Ju
;
Chiarella, Thomas
;
Ragnarsson, Lars-Ake
;
Loo, Roger
;
Kerner, Christoph
;
Crabbe, Yvo
;
Franco, Jacopo
;
Tseng, Joshua
;
Wang, Wei-E
;
Rohr, Erika
;
Schram, Tom
;
Richard, Olivier
;
Bender, Hugo
;
Biesemans, Serge
;
Absil, Philippe
;
Hoffmann, Thomas Y.
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since deposited on 2021-10-19
Acq. date: 2025-12-09
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2081
since deposited on 2021-10-19
Acq. date: 2025-12-09
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Downloads
1
since deposited on 2021-10-19
Acq. date: 2025-12-09
Views
2081
since deposited on 2021-10-19
Acq. date: 2025-12-09
Citations