Show simple item record

Run-time self-tuning banked loop buffer architecture for power optimization of dynamic workload applications

dc.contributor.authorArtes, A.
dc.contributor.authorAyala, J.
dc.contributor.authorSathanur, Ashoka
dc.contributor.authorHuisken, Jos
dc.contributor.authorCatthoor, Francky
dc.date.accessioned2021-10-19T12:29:53Z
dc.date.available2021-10-19T12:29:53Z
dc.date.issued2011
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/18495
dc.sourceIIOimport
dc.titleRun-time self-tuning banked loop buffer architecture for power optimization of dynamic workload applications
dc.typeProceedings paper
dc.contributor.imecauthorCatthoor, Francky
dc.contributor.orcidimecCatthoor, Francky::0000-0002-3599-8515
dc.date.embargo9999-12-31
dc.source.peerreviewno
dc.source.beginpage136
dc.source.endpage141
dc.source.conferenceIEEE/IFIP 19th International Conference on VLSI and System-on-Chip - VLSI-SoC
dc.source.conferencedate3/10/2011
dc.source.conferencelocationHong Kong China
imec.availabilityPublished - open access


Files in this item

Thumbnail
Name:
24550.pdf
Size:
1.173Mb
Format:
PDF
View/open

This item appears in the following collection(s)

Show simple item record