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High-level analog/digital partitioning in low-power signal processing

dc.contributor.authorDonnay, Stephane
dc.contributor.authorGielen, Georges
dc.contributor.authorSansen, Willy
dc.date.accessioned2021-09-30T08:14:39Z
dc.date.available2021-09-30T08:14:39Z
dc.date.issued1997
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/1870
dc.sourceIIOimport
dc.titleHigh-level analog/digital partitioning in low-power signal processing
dc.typeProceedings paper
dc.contributor.imecauthorDonnay, Stephane
dc.contributor.imecauthorGielen, Georges
dc.source.peerreviewno
dc.source.beginpage56
dc.source.endpage60
dc.source.conferenceProceedings European Design & Test Conference. ED&TC 97; March 1997. Paris, France.
dc.source.conferencelocation
imec.availabilityPublished - imec


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