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dc.contributor.authorFranco, Jacopo
dc.contributor.authorKaczer, Ben
dc.contributor.authorToledano Luque, Maria
dc.contributor.authorRoussel, Philippe
dc.contributor.authorHehenberger, Philip
dc.contributor.authorGrasser, Tibor
dc.contributor.authorMitard, Jerome
dc.contributor.authorEneman, Geert
dc.contributor.authorWitters, Liesbeth
dc.contributor.authorHoffmann, Thomas Y.
dc.contributor.authorGroeseneken, Guido
dc.date.accessioned2021-10-19T13:36:42Z
dc.date.available2021-10-19T13:36:42Z
dc.date.issued2011
dc.identifier.issn0167-9317
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/18927
dc.sourceIIOimport
dc.titleOn the impact of the Si passivation layer thickness on the NBTI of nanoscaled Si0.45Ge0.55 pMOSFETs
dc.typeJournal article
dc.contributor.imecauthorFranco, Jacopo
dc.contributor.imecauthorKaczer, Ben
dc.contributor.imecauthorRoussel, Philippe
dc.contributor.imecauthorMitard, Jerome
dc.contributor.imecauthorEneman, Geert
dc.contributor.imecauthorWitters, Liesbeth
dc.contributor.imecauthorGroeseneken, Guido
dc.contributor.orcidimecFranco, Jacopo::0000-0002-7382-8605
dc.contributor.orcidimecKaczer, Ben::0000-0002-1484-4007
dc.contributor.orcidimecRoussel, Philippe::0000-0002-0402-8225
dc.contributor.orcidimecMitard, Jerome::0000-0002-7422-079X
dc.contributor.orcidimecEneman, Geert::0000-0002-5849-3384
dc.date.embargo9999-12-31
dc.source.peerreviewyes
dc.source.beginpage1388
dc.source.endpage1391
dc.source.journalMicroelectronic Engineering
dc.source.issue7
dc.source.volume88
imec.availabilityPublished - open access
imec.internalnotesSpecial Issue Proceedings INFOS conference


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