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Admittance characterization and interface trap property extraction for Ge/III-V MOS structures

dc.contributor.authorMartens, Koen
dc.date.accessioned2021-10-19T16:05:53Z
dc.date.available2021-10-19T16:05:53Z
dc.date.issued2011
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/19392
dc.sourceIIOimport
dc.titleAdmittance characterization and interface trap property extraction for Ge/III-V MOS structures
dc.typeProceedings paper
dc.contributor.imecauthorMartens, Koen
dc.contributor.orcidimecMartens, Koen::0000-0001-7135-5536
dc.date.embargo9999-12-31
dc.source.peerreviewno
dc.source.conferenceIEEE International Conference on Microelectronic Test Structures - ICMTS
dc.source.conferencedate4/04/2011
dc.source.conferencelocationAmsterdam Netherlands
imec.availabilityPublished - open access


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