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Power modeling of wide-SIMD baseband processor datapath for different clock frequencies

dc.contributor.authorPalkovic, Martin
dc.contributor.authorVanhoof, Bart
dc.contributor.authorHartmann, Matthias
dc.contributor.authorVander Aa, Tom
dc.contributor.authorDejonghe, Antoine
dc.contributor.authorVan der Perre, Liesbet
dc.date.accessioned2021-10-19T17:03:21Z
dc.date.available2021-10-19T17:03:21Z
dc.date.issued2011-06
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/19534
dc.sourceIIOimport
dc.titlePower modeling of wide-SIMD baseband processor datapath for different clock frequencies
dc.typeProceedings paper
dc.contributor.imecauthorHartmann, Matthias
dc.contributor.imecauthorVander Aa, Tom
dc.contributor.orcidimecHartmann, Matthias::0000-0001-6248-1151
dc.contributor.orcidimecVander Aa, Tom::0000-0002-1504-5266
dc.source.peerreviewyes
dc.source.conferenceWireless Inovation Forum European Conference on Communication Technologies and Software Defined Radio - SDR
dc.source.conferencedate22/06/2011
dc.source.conferencelocationBrussels Belgium
imec.availabilityPublished - imec


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