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3D chip stacking of RF devices with Cu TSV, Cu/Sn bumps and sealing ring

dc.contributor.authorZhang, Wenqi
dc.contributor.authorMajeed, Bivragh
dc.contributor.authorSun, Xiao
dc.contributor.authorPosada Quijano, Guillermo
dc.contributor.authorDiekmann, C.
dc.contributor.authorEggs, C.
dc.contributor.authorSchmidhammer, E.
dc.contributor.authorDe Raedt, Walter
dc.date.accessioned2021-10-19T22:22:45Z
dc.date.available2021-10-19T22:22:45Z
dc.date.issued2011
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/20214
dc.sourceIIOimport
dc.title3D chip stacking of RF devices with Cu TSV, Cu/Sn bumps and sealing ring
dc.typeProceedings paper
dc.contributor.imecauthorMajeed, Bivragh
dc.contributor.imecauthorSun, Xiao
dc.contributor.imecauthorDe Raedt, Walter
dc.contributor.orcidimecDe Raedt, Walter::0000-0002-7117-7976
dc.source.peerreviewyes
dc.source.conferenceInternational Conference on Solid State Devices and Materials - SSDM
dc.source.conferencedate28/09/2011
dc.source.conferencelocationNagoya Japan
imec.availabilityPublished - imec


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