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Digital-circuit analysis of short gate tunnel-FETs for low-voltage applications

dc.contributor.authorZhuge, Jing
dc.contributor.authorVerhulst, Anne
dc.contributor.authorVandenberghe, William
dc.contributor.authorDehaene, Wim
dc.contributor.authorHuang, Ru
dc.contributor.authorWang, YangYuan
dc.contributor.authorGroeseneken, Guido
dc.date.accessioned2021-10-19T22:31:16Z
dc.date.available2021-10-19T22:31:16Z
dc.date.issued2011
dc.identifier.issn0268-1242
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/20230
dc.sourceIIOimport
dc.titleDigital-circuit analysis of short gate tunnel-FETs for low-voltage applications
dc.typeJournal article
dc.contributor.imecauthorVerhulst, Anne
dc.contributor.imecauthorDehaene, Wim
dc.contributor.imecauthorGroeseneken, Guido
dc.contributor.orcidimecVerhulst, Anne::0000-0002-3742-9017
dc.source.peerreviewyes
dc.source.beginpage085001-1
dc.source.journalSemiconductor Science and Technology
dc.source.issue8
dc.source.volume26
dc.identifier.urlhttp://iopscience.iop.org/0268-1242/26/8/085001/
imec.availabilityPublished - imec


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