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Short gate tunnel-FETs for low voltage digital applications

dc.contributor.authorZhuge, Jing
dc.contributor.authorVerhulst, Anne
dc.contributor.authorVandenberghe, William
dc.contributor.authorDehaene, Wim
dc.contributor.authorHuang, Ru
dc.contributor.authorWang, Yangyuan
dc.contributor.authorGroeseneken, Guido
dc.date.accessioned2021-10-19T22:31:47Z
dc.date.available2021-10-19T22:31:47Z
dc.date.issued2011
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/20231
dc.sourceIIOimport
dc.titleShort gate tunnel-FETs for low voltage digital applications
dc.typeProceedings paper
dc.contributor.imecauthorVerhulst, Anne
dc.contributor.imecauthorDehaene, Wim
dc.contributor.imecauthorGroeseneken, Guido
dc.contributor.orcidimecVerhulst, Anne::0000-0002-3742-9017
dc.source.peerreviewno
dc.source.conferenceChina Semiconductor Technology International Conference - CSTIC
dc.source.conferencedate13/03/2011
dc.source.conferencelocationShanghai China
dc.identifier.urlhttp://semiconchina.semi.org/article_2161_745.htm
imec.availabilityPublished - imec


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