dc.contributor.author | Miranda, Miguel | |
dc.contributor.author | Kaspar, Martin | |
dc.contributor.author | Catthoor, Francky | |
dc.contributor.author | De Man, Hugo | |
dc.date.accessioned | 2021-09-30T09:18:33Z | |
dc.date.available | 2021-09-30T09:18:33Z | |
dc.date.issued | 1997 | |
dc.identifier.uri | https://imec-publications.be/handle/20.500.12860/2027 | |
dc.source | IIOimport | |
dc.title | Architectural exploration and optimization for counter based hardware address generation | |
dc.type | Proceedings paper | |
dc.contributor.imecauthor | Catthoor, Francky | |
dc.contributor.imecauthor | De Man, Hugo | |
dc.contributor.orcidimec | Catthoor, Francky::0000-0002-3599-8515 | |
dc.source.peerreview | no | |
dc.source.beginpage | 293 | |
dc.source.endpage | 298 | |
dc.source.conference | European Design & Test Conference - ED&TC 97 | |
dc.source.conferencedate | 17/03/1997 | |
dc.source.conferencelocation | Paris France | |
imec.availability | Published - imec | |