dc.contributor.author | Kar, Gouri Sankar | |
dc.contributor.author | Fantini, Andrea | |
dc.contributor.author | Chen, Yangyin | |
dc.contributor.author | Paraschiv, Vasile | |
dc.contributor.author | Govoreanu, Bogdan | |
dc.contributor.author | Hody, Hubert | |
dc.contributor.author | Jossart, Nico | |
dc.contributor.author | Tielens, Hilde | |
dc.contributor.author | Brus, Stephan | |
dc.contributor.author | Richard, Olivier | |
dc.contributor.author | Vandeweyer, Tom | |
dc.contributor.author | Wouters, Dirk | |
dc.contributor.author | Altimime, Laith | |
dc.contributor.author | Jurczak, Gosia | |
dc.date.accessioned | 2021-10-20T12:06:38Z | |
dc.date.available | 2021-10-20T12:06:38Z | |
dc.date.issued | 2012 | |
dc.identifier.uri | https://imec-publications.be/handle/20.500.12860/20906 | |
dc.source | IIOimport | |
dc.title | Process-improved RRAM cell performance and reliability and paving the way for manufacturability and scalability for high density memory application | |
dc.type | Proceedings paper | |
dc.contributor.imecauthor | Kar, Gouri Sankar | |
dc.contributor.imecauthor | Fantini, Andrea | |
dc.contributor.imecauthor | Chen, Yangyin | |
dc.contributor.imecauthor | Paraschiv, Vasile | |
dc.contributor.imecauthor | Govoreanu, Bogdan | |
dc.contributor.imecauthor | Hody, Hubert | |
dc.contributor.imecauthor | Jossart, Nico | |
dc.contributor.imecauthor | Tielens, Hilde | |
dc.contributor.imecauthor | Brus, Stephan | |
dc.contributor.imecauthor | Richard, Olivier | |
dc.contributor.imecauthor | Vandeweyer, Tom | |
dc.contributor.imecauthor | Jurczak, Gosia | |
dc.contributor.orcidimec | Richard, Olivier::0000-0002-3994-8021 | |
dc.date.embargo | 9999-12-31 | |
dc.source.peerreview | yes | |
dc.source.beginpage | 157 | |
dc.source.endpage | 158 | |
dc.source.conference | VLSI Symposium on VLSI Technology - VLSIT | |
dc.source.conferencedate | 12/06/2012 | |
dc.source.conferencelocation | Honolulu, HI USA | |
imec.availability | Published - open access | |