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A DfT architecture for 3D-SICs based on a standardizable die wrapper

dc.contributor.authorMarinissen, Erik Jan
dc.contributor.authorChi, Chun-Chuan
dc.contributor.authorKonijnenburg, Mario
dc.contributor.authorVerbree, Jouke
dc.date.accessioned2021-10-20T13:15:04Z
dc.date.available2021-10-20T13:15:04Z
dc.date.issued2012-02
dc.identifier.issn0923-8174
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/21104
dc.sourceIIOimport
dc.titleA DfT architecture for 3D-SICs based on a standardizable die wrapper
dc.typeJournal article
dc.contributor.imecauthorMarinissen, Erik Jan
dc.contributor.imecauthorKonijnenburg, Mario
dc.contributor.orcidimecMarinissen, Erik Jan::0000-0002-5058-8303
dc.contributor.orcidimecKonijnenburg, Mario::0000-0001-8016-0888
dc.source.peerreviewyes
dc.source.beginpage73
dc.source.endpage92
dc.source.journalJournal of Electronic Testing - Theory and Applications
dc.source.issue1
dc.source.volume28
dc.identifier.urlhttp://dx.doi.org/10.1007/s10836-011-5269-9
imec.availabilityPublished - imec


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