Interconnect test for wide-IO memory-on-logic stacks
dc.contributor.author | Marinissen, Erik Jan | |
dc.contributor.author | Deutsch, Sergej | |
dc.contributor.author | Keller, Brion | |
dc.contributor.author | Chickermane, Vivek | |
dc.contributor.author | Mukherjee, Subhashish | |
dc.contributor.author | Sood, Navdeep | |
dc.date.accessioned | 2021-10-20T13:15:29Z | |
dc.date.available | 2021-10-20T13:15:29Z | |
dc.date.issued | 2012-07 | |
dc.identifier.issn | 1363-5182 | |
dc.identifier.uri | https://imec-publications.be/handle/20.500.12860/21105 | |
dc.source | IIOimport | |
dc.title | Interconnect test for wide-IO memory-on-logic stacks | |
dc.type | Journal article | |
dc.contributor.imecauthor | Marinissen, Erik Jan | |
dc.contributor.orcidimec | Marinissen, Erik Jan::0000-0002-5058-8303 | |
dc.source.peerreview | no | |
dc.source.beginpage | 112 | |
dc.source.endpage | 117 | |
dc.source.journal | Future Fab International | |
dc.source.issue | 42 | |
dc.identifier.url | http://www.future-fab.com/documents.asp?d_ID=4965 | |
imec.availability | Published - imec |
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