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A 65 nm, 850 MHz, 256 kbit, 4.3 pJ/access, ultra low leakage power memory using dynamic cell stability and a dual swing data link

dc.contributor.authorRooseleer, Bram
dc.contributor.authorCosemans, Stefan
dc.contributor.authorDehaene, Wim
dc.date.accessioned2021-10-20T15:29:43Z
dc.date.available2021-10-20T15:29:43Z
dc.date.issued2012
dc.identifier.issn0018-9200
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/21426
dc.sourceIIOimport
dc.titleA 65 nm, 850 MHz, 256 kbit, 4.3 pJ/access, ultra low leakage power memory using dynamic cell stability and a dual swing data link
dc.typeJournal article
dc.contributor.imecauthorRooseleer, Bram
dc.contributor.imecauthorCosemans, Stefan
dc.contributor.imecauthorDehaene, Wim
dc.date.embargo9999-12-31
dc.source.peerreviewyes
dc.source.beginpage1784
dc.source.endpage1796
dc.source.journalIEEE Journal of Solid-State Circuits
dc.source.issue7
dc.source.volume47
imec.availabilityPublished - open access


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