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Impact of tester source impedance on HBM failure level

dc.contributor.authorScholz, Mirko
dc.contributor.authorChen, Shih-Hung
dc.contributor.authorLinten, Dimitri
dc.contributor.authorThijs, Steven
dc.contributor.authorSawada, Masanori
dc.contributor.authorJohnsson, David
dc.contributor.authorGroeseneken, Guido
dc.date.accessioned2021-10-20T15:51:17Z
dc.date.available2021-10-20T15:51:17Z
dc.date.issued2012
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/21474
dc.sourceIIOimport
dc.titleImpact of tester source impedance on HBM failure level
dc.typeProceedings paper
dc.contributor.imecauthorChen, Shih-Hung
dc.contributor.imecauthorLinten, Dimitri
dc.contributor.imecauthorThijs, Steven
dc.contributor.imecauthorGroeseneken, Guido
dc.contributor.orcidimecLinten, Dimitri::0000-0001-8434-1838
dc.contributor.orcidimecThijs, Steven::0000-0003-2889-8345
dc.date.embargo9999-12-31
dc.source.peerreviewyes
dc.source.beginpage329
dc.source.endpage338
dc.source.conferenceInternational ESD Workshop
dc.source.conferencedate14/05/2012
dc.source.conferencelocationOud Turnhout Belgium
imec.availabilityPublished - open access


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