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Scaling the Ge gate stack: Towards sub 1nm EOT

dc.contributor.authorSioncke, Sonja
dc.contributor.authorLin, Dennis
dc.contributor.authorDelabie, Annelies
dc.contributor.authorConard, Thierry
dc.contributor.authorStruyf, Herbert
dc.contributor.authorDe Gendt, Stefan
dc.contributor.authorCaymax, Matty
dc.date.accessioned2021-10-20T16:13:41Z
dc.date.available2021-10-20T16:13:41Z
dc.date.issued2012
dc.identifier.issn2162-8769
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/21521
dc.sourceIIOimport
dc.titleScaling the Ge gate stack: Towards sub 1nm EOT
dc.typeJournal article
dc.contributor.imecauthorLin, Dennis
dc.contributor.imecauthorDelabie, Annelies
dc.contributor.imecauthorConard, Thierry
dc.contributor.imecauthorStruyf, Herbert
dc.contributor.imecauthorDe Gendt, Stefan
dc.contributor.imecauthorCaymax, Matty
dc.contributor.orcidimecConard, Thierry::0000-0002-4298-5851
dc.contributor.orcidimecDe Gendt, Stefan::0000-0003-3775-3578
dc.date.embargo9999-12-31
dc.source.peerreviewyes
dc.source.beginpage127
dc.source.endpage132
dc.source.journalECS Journal of Solid State Science and Technology
dc.source.issue3
dc.source.volume1
imec.availabilityPublished - open access


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