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Impact of duty factor, stress stimuli, gate and drive strength on gate delay degradation with an atomistic trap-based BTI model

dc.contributor.authorKukner, Halil
dc.contributor.authorWeckx, Pieter
dc.contributor.authorRaghavan, Praveen
dc.contributor.authorKaczer, Ben
dc.contributor.authorCatthoor, Francky
dc.contributor.authorVan der Perre, Liesbet
dc.contributor.authorLauwereins, Rudy
dc.contributor.authorGroeseneken, Guido
dc.date.accessioned2021-10-21T08:58:36Z
dc.date.available2021-10-21T08:58:36Z
dc.date.issued2013
dc.identifier.issn0141-9331
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/22621
dc.sourceIIOimport
dc.titleImpact of duty factor, stress stimuli, gate and drive strength on gate delay degradation with an atomistic trap-based BTI model
dc.typeJournal article
dc.contributor.imecauthorWeckx, Pieter
dc.contributor.imecauthorKaczer, Ben
dc.contributor.imecauthorCatthoor, Francky
dc.contributor.imecauthorLauwereins, Rudy
dc.contributor.imecauthorGroeseneken, Guido
dc.contributor.orcidimecKaczer, Ben::0000-0002-1484-4007
dc.contributor.orcidimecCatthoor, Francky::0000-0002-3599-8515
dc.contributor.orcidimecLauwereins, Rudy::0000-0002-3861-0168
dc.source.peerreviewyes
dc.source.beginpage792
dc.source.endpage800
dc.source.journalMicroprocessors and Microsystems
dc.source.issue8_A
dc.source.volume37
dc.identifier.urlhttp://www.sciencedirect.com/science/article/pii/S0141933113000574
imec.availabilityPublished - imec
imec.internalnotesSpecial issue of Reliability and Dependability in new (MP)SoC


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