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Grounded-gate nMOS transistor behaviour under CDM ESD stress conditions

dc.contributor.authorVerhaege, Koen
dc.contributor.authorRuss, Christian
dc.contributor.authorLuchies, J. M.
dc.contributor.authorGroeseneken, Guido
dc.contributor.authorKuper, F. G.
dc.date.accessioned2021-09-30T10:01:55Z
dc.date.available2021-09-30T10:01:55Z
dc.date.issued1997
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/2285
dc.sourceIIOimport
dc.titleGrounded-gate nMOS transistor behaviour under CDM ESD stress conditions
dc.typeJournal article
dc.contributor.imecauthorGroeseneken, Guido
dc.date.embargo9999-12-31
dc.source.peerreviewno
dc.source.beginpage1972
dc.source.endpage1980
dc.source.journalIEEE Trans. Electron Devices
dc.source.issue11
dc.source.volume44
imec.availabilityPublished - open access


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