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A high-voltage n-DMOS structure in a standard sub-micron CMOS process

dc.contributor.authorVermandel, Miguel
dc.contributor.authorDe Backere, Christof
dc.contributor.authorVan Calster, Andre
dc.date.accessioned2021-09-30T10:02:55Z
dc.date.available2021-09-30T10:02:55Z
dc.date.issued1997
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/2289
dc.sourceIIOimport
dc.titleA high-voltage n-DMOS structure in a standard sub-micron CMOS process
dc.typeProceedings paper
dc.contributor.imecauthorVan Calster, Andre
dc.date.embargo9999-12-31
dc.source.peerreviewno
dc.source.beginpage508
dc.source.endpage511
dc.source.conferenceESSDERC '97: Proceedings of the 27th European Solid-State Device Research Conference
dc.source.conferencedate22/09/1997
dc.source.conferencelocationStuttgart Germany
imec.availabilityPublished - open access


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