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Automated DfT insertion and test generation for 3D-SICs with embedded cores and multiple towers

dc.contributor.authorPapameletis, Christos
dc.contributor.authorKeller, Brion
dc.contributor.authorChickermane, Vivek
dc.contributor.authorMarinissen, Erik Jan
dc.contributor.authorHamdioui, Said
dc.date.accessioned2021-10-21T10:44:12Z
dc.date.available2021-10-21T10:44:12Z
dc.date.issued2013-05
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/22904
dc.sourceIIOimport
dc.titleAutomated DfT insertion and test generation for 3D-SICs with embedded cores and multiple towers
dc.typeProceedings paper
dc.contributor.imecauthorMarinissen, Erik Jan
dc.contributor.orcidimecMarinissen, Erik Jan::0000-0002-5058-8303
dc.source.peerreviewyes
dc.source.beginpage15
dc.source.endpage20
dc.source.conferenceIEEE European Test Symposium - ETS
dc.source.conferencedate27/05/2013
dc.source.conferencelocationAvignon France
dc.identifier.urlhttp://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=6569350
imec.availabilityPublished - imec


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