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3D stacking of ultra-thin chip packages: an innovative packaging and interconnection technology

dc.contributor.authorPriyabadini, Swarnakamal
dc.contributor.authorSterken, Tom
dc.contributor.authorVan Hoorebeke, Luc
dc.contributor.authorVanfleteren, Jan
dc.date.accessioned2021-10-21T11:06:48Z
dc.date.available2021-10-21T11:06:48Z
dc.date.issued2013-07
dc.identifier.issn1521-3331
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/22957
dc.sourceIIOimport
dc.title3D stacking of ultra-thin chip packages: an innovative packaging and interconnection technology
dc.typeJournal article
dc.contributor.imecauthorSterken, Tom
dc.contributor.imecauthorVanfleteren, Jan
dc.contributor.orcidimecVanfleteren, Jan::0000-0002-9654-7304
dc.date.embargo9999-12-31
dc.source.peerreviewyes
dc.source.beginpage1144
dc.source.endpage1122
dc.source.journalIEEE Transactions on Components and Packaging Technologies
dc.source.volume3
dc.identifier.urlhttp://ieeexplore.ieee.org/xpl/articleDetails.jsp?tp=&arnumber=6410397&queryText%3D3D+stacking+of+ultra-thin+chip+packages%3A+an
imec.availabilityPublished - open access


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