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Enabling interconnect scaling with spacer-defined double patterning (SDDP)

dc.contributor.authorSiew, Yong Kong
dc.contributor.authorStucchi, Michele
dc.contributor.authorVersluijs, Janko
dc.contributor.authorRoussel, Philippe
dc.contributor.authorKunnen, Eddy
dc.contributor.authorPantouvaki, Marianna
dc.contributor.authorBeyer, Gerald
dc.contributor.authorTokei, Zsolt
dc.date.accessioned2021-10-21T12:03:00Z
dc.date.available2021-10-21T12:03:00Z
dc.date.issued2013
dc.identifier.issn0167-9317
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/23081
dc.sourceIIOimport
dc.titleEnabling interconnect scaling with spacer-defined double patterning (SDDP)
dc.typeJournal article
dc.contributor.imecauthorSiew, Yong Kong
dc.contributor.imecauthorStucchi, Michele
dc.contributor.imecauthorVersluijs, Janko
dc.contributor.imecauthorRoussel, Philippe
dc.contributor.imecauthorPantouvaki, Marianna
dc.contributor.imecauthorBeyer, Gerald
dc.contributor.imecauthorTokei, Zsolt
dc.contributor.orcidimecRoussel, Philippe::0000-0002-0402-8225
dc.date.embargo9999-12-31
dc.source.peerreviewyes
dc.source.beginpage116
dc.source.endpage120
dc.source.journalMicroelectronic Engineering
dc.source.volume112
imec.availabilityPublished - open access


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