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Gbps throughput architecture for turbo decoder

dc.contributor.authorCallejon Montoza, Antonio Manuel
dc.contributor.authorLi, Meng
dc.contributor.authorHuang, Yanxiang
dc.contributor.authorPollin, Sofie
dc.contributor.authorVan der Perre, Liesbet
dc.date.accessioned2021-10-22T00:51:28Z
dc.date.available2021-10-22T00:51:28Z
dc.date.issued2014
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/23600
dc.sourceIIOimport
dc.titleGbps throughput architecture for turbo decoder
dc.typeProceedings paper
dc.contributor.imecauthorLi, Meng
dc.contributor.imecauthorPollin, Sofie
dc.source.peerreviewyes
dc.source.beginpage178
dc.source.endpage185
dc.source.conference35th WIC Symposium on Information Theory and Signal Processing in the Benelux
dc.source.conferencedate12/05/2014
dc.source.conferencelocationEindhoven The Netherladns
imec.availabilityPublished - imec


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