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Low-cost post-bond testing of 3D-ICs containing a passive silicon interposer base

dc.contributor.authorChi, Chun-Chuan
dc.contributor.authorMarinissen, Erik Jan
dc.contributor.authorGoel, Sandeep Kumar
dc.contributor.authorWu, Cheng-Wen
dc.date.accessioned2021-10-22T00:57:00Z
dc.date.available2021-10-22T00:57:00Z
dc.date.issued2014-11
dc.identifier.issn1063-8210
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/23643
dc.sourceIIOimport
dc.titleLow-cost post-bond testing of 3D-ICs containing a passive silicon interposer base
dc.typeJournal article
dc.contributor.imecauthorMarinissen, Erik Jan
dc.contributor.orcidimecMarinissen, Erik Jan::0000-0002-5058-8303
dc.source.peerreviewyes
dc.source.beginpage2388
dc.source.endpage2401
dc.source.journalIEEE Transactions on Very Large Scale Integration (VLSI) Systems
dc.source.issue11
dc.source.volume22
dc.identifier.urlhttp://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=6680768
imec.availabilityPublished - imec


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