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Influence of the S/D architecture on the VT of deep submicron MOSFETs

dc.contributor.authorBiesemans, Serge
dc.contributor.authorDe Meyer, Kristin
dc.date.accessioned2021-09-30T11:28:25Z
dc.date.available2021-09-30T11:28:25Z
dc.date.issued1998
dc.identifier.urihttps://imec-publications.be/handle/20.500.12860/2398
dc.sourceIIOimport
dc.titleInfluence of the S/D architecture on the VT of deep submicron MOSFETs
dc.typeProceedings paper
dc.contributor.imecauthorBiesemans, Serge
dc.contributor.imecauthorDe Meyer, Kristin
dc.date.embargo9999-12-31
dc.source.peerreviewno
dc.source.beginpage308
dc.source.endpage311
dc.source.conferenceSimulation of Semiconductor Processes and Devices 1998 - SISPAD 98
dc.source.conferencedate2/09/1998
dc.source.conferencelocationLeuven Belgium
imec.availabilityPublished - open access


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