dc.contributor.author | Ritzenthaler, Romain | |
dc.contributor.author | Schram, Tom | |
dc.contributor.author | Spessot, Alessio | |
dc.contributor.author | Caillat, Christian | |
dc.contributor.author | Cho, Moon Ju | |
dc.contributor.author | Simoen, Eddy | |
dc.contributor.author | Aoulaiche, Marc | |
dc.contributor.author | Albert, Johan | |
dc.contributor.author | Chew, Soon Aik | |
dc.contributor.author | Noh, Kyung Bong | |
dc.contributor.author | Son, Yunik | |
dc.contributor.author | Fazan, Pierre | |
dc.contributor.author | Horiguchi, Naoto | |
dc.contributor.author | Thean, Aaron | |
dc.date.accessioned | 2021-10-22T05:07:17Z | |
dc.date.available | 2021-10-22T05:07:17Z | |
dc.date.issued | 2014 | |
dc.identifier.uri | https://imec-publications.be/handle/20.500.12860/24435 | |
dc.source | IIOimport | |
dc.title | A new high-k/metal gate CMOS integration scheme (Diffusion and Gate Replacement) suppressing gate height asymmetry and compatible with high-thermal budget memory technologies | |
dc.type | Proceedings paper | |
dc.contributor.imecauthor | Ritzenthaler, Romain | |
dc.contributor.imecauthor | Schram, Tom | |
dc.contributor.imecauthor | Spessot, Alessio | |
dc.contributor.imecauthor | Simoen, Eddy | |
dc.contributor.imecauthor | Fazan, Pierre | |
dc.contributor.imecauthor | Horiguchi, Naoto | |
dc.contributor.imecauthor | Thean, Aaron | |
dc.contributor.orcidimec | Ritzenthaler, Romain::0000-0002-8615-3272 | |
dc.contributor.orcidimec | Schram, Tom::0000-0003-1533-7055 | |
dc.contributor.orcidimec | Simoen, Eddy::0000-0002-5218-4046 | |
dc.contributor.orcidimec | Horiguchi, Naoto::0000-0001-5490-0416 | |
dc.date.embargo | 9999-12-31 | |
dc.source.peerreview | yes | |
dc.source.beginpage | 772 | |
dc.source.endpage | 775 | |
dc.source.conference | International Electron Devices Meeting - IEDM | |
dc.source.conferencedate | 15/12/2014 | |
dc.source.conferencelocation | San Francisco, CA USA | |
imec.availability | Published - open access | |